Light emitting diodes can be fabricated by depositing one or more layers of a semiconductor material onto a growth substrate. Deposition methods can include chemical vapor deposition (CVD), metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy MBE), liquid phase epitaxy (LPE) and vapor phase epitaxy (VPE). When a layer of semiconductor material is deposited onto a growth substrate, tensile or compressive stresses can occur that affect the planarity of the deposited film and the growth substrate as well as the electrical and optical properties of the semiconductor layer.
In one example, gallium nitride based light emitting diode (LED) devices can be formed by depositing one or more thin layers of the semiconductors gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN) or aluminum indium gallium nitride (AlInGaN) onto non-native growth substrates such as sapphire or silicon carbide (SiC). Due to thermal expansion effects at high deposition temperatures and lattice mismatches between the semiconducting layer and the growth substrate, a significant number of defects are introduced into the semiconducting layers during deposition. For this reason many groups are pursuing freestanding GaN wafers as growth substrates. These efforts are still very expensive and limited by the size of the freestanding wafer. Alternatively, hydride vapor phase epitaxy (HVPE) has allowed for the creation of moderately thick (10 to 20 microns) layers of GaN on sapphire with reasonably high crystal quality. The stresses in such layers, however, lead to strains such as wafer bowing that make subsequent processing difficult, especially if traditional planar lithography or wafer-bonding steps are required.
It is well known that etching process steps subsequent to film deposition can modify the semiconductor layers formed on a growth substrate. Laser processing, for example, has been used to etch grooves in GaN layers deposited on sapphire as well as other transparent growth substrates. Pulsed lasers such as frequency-tripled or frequency-quadrupled yttrium aluminum garnet (YAG) lasers and excimer lasers can be utilized. Sufficient energy from the laser beam is present to dice GaN layers into individual LED dies via a localized ablation process.
Researchers at the University of California at Berkeley have also developed a process called laser liftoff whereby the entire GaN layer or array of GaN LED dies can be removed from an optically transparent growth substrate such as sapphire. For example, a sapphire wafer can be coated with the appropriate GaN semiconductor layers for LED fabrication, including the deposition of at least one of the metal contacts. Individual dies are scribed in the semiconducting layers using a narrow beam laser or by mechanical means. At this stage, the LED dies are still fully attached to the growth substrate. A transfer substrate is attached to the exposed surface of the array of dies opposite the growth substrate. Light from an excimer laser is directed through the bare face of the growth substrate to the semiconductor layer of the LED dies located on the opposite face of the growth substrate. Due to the difference in the absorption coefficients between the sapphire and the GaN at the excimer laser wavelength, the majority of the energy from the laser is preferentially deposited into the interface between the sapphire and the GaN LED dies. This effectively separates the GaN LED dies as a group from the sapphire growth substrate.
Subsequent to laser liftoff, additional metal contacts can be added to the exposed planar surfaces and the dies can be separated from the transfer substrate as individual devices. LED dies produced by the laser liftoff process suffer, however, from significant current spreading issues due to lack of an attached electrically conductive substrate and the thinness of the semiconductor layers. A typical total thickness of the semiconductor layers is approximately 4 microns. Various means of enhancing current spreading have been used for laser liftoff dies including metal grip contacts, transparent conductive coatings and wafer bonding of electrically-conducting, low-absorbing layers such as doped SiC.
In another device fabrication method, epitaxial lateral overgrowth can be used to form isolated single crystal regions within a GaN semiconductor layer. In this approach, epitaxial growth is preferentially biased in the lateral direction across a wafer to form narrow wings of high crystal quality material. However, a very close spacing on the order of 10 microns or so is required between isolated regions. The lateral growth process can make high-quality, small devices a few microns wide but large area devices are difficult to fabricate. The epitaxial lateral overgrowth process is appropriate for fabricating GaN diode lasers but has not proved useful for fabricated large area GaN LEDs.
In order to reduce current spreading issues in light emitting diodes and to produce devices that are on the order of one square millimeter or larger in area, there exists a need for LEDs with at least one thick semiconductor layer. In order to increase the light extraction efficiency of such a device, there also exists a need to position one of the two electrodes for such the device on the edge surfaces of the thick semiconductor layer rather than on the planar top or bottom surfaces of the layer.
In addition, there exists a need for a fabrication process whereby thicker, high-quality semiconductor layers and devices can be economically fabricated. Presently, more traditional patterning approaches are used, including the use of mask based lithography and etching processes. Unfortunately, nitride based devices in particular are difficult to etch, especially anisotropically. Etch rates on the order of hundreds of nm/minute limit the feature thicknesses that can be economically rendered in these materials. As such, the use of mechanical means such as dicing and laser scribing are typically used even in thin devices. Conversely, there is a desire to increase the thickness of at least one layer as stated earlier for current spreading considerations. Therefore, there exists a need for an improved high-speed method for patterning light emitting diodes. Such a fabrication process should also be able to operate on wafers that are bowed as well as on planar wafers.
Finally, there is a need for an improved interconnect means. Presently most LEDs are connected via a top wirebond or a flipchip design. In the case of wirebonds, light generated under the bond pad is usually lost or significantly reduced due to simple blockage. In addition, the typical material of choice is gold, which can lead to absorption of reflected rays even if the rays do escape from the die itself. Lastly, wirebonds necessitate the use of some form of strain relief, especially in high current devices. This limits optical design flexibility by typically requiring the use of a large polymer lens. Flip chip designs, conversely, eliminate the top wirebond issues but create issues related to reduced emission area and less than optimum current spreading. There exists the need for an alternate interconnect scheme that minimizes loss of active area while not requiring any top contact. Such a solution should allow for the use of thicker device layers and be compatible with laser liftoff approaches.